Endianness
IRI: https://w3id.org/altium/cdm/deviceModel/Endianness
Specifies the byte-ordering convention of the processor. Bi-endian indicates the hardware can be configured for either mode.
Values
| Value | Description |
|---|---|
LittleEndian |
Least significant byte is stored at the lowest address. |
BigEndian |
Most significant byte is stored at the lowest address. |
BiEndian |
Processor supports switching between little and big endian modes. |
Used by
| Field | Class | Description |
|---|---|---|
| endian | Processor | The byte-ordering capability of the core. If Bi-endian, the device is considered compatible with both LE and BE use-cases. |