Harness Project
IRI: https://w3id.org/altium/cdm/design/HarnessProject
Bounded context: design
Harness Project defines the design of a cable and wiring harness as a standalone yet integrable artifact, capturing connectors, wires, splices, and pin-to-pin mappings required to implement electrical interconnects between boards and system elements.
Diagram
---
config:
layout: elk
theme: neutral
class:
hideEmptyMembersBox: true
---
classDiagram
direction LR
class des_HarnessProject["Harness Project"]
style des_HarnessProject fill:#93c47d
click des_HarnessProject href "../../classes/des_HarnessProject/"
class des_Project["Hardware Project"]
style des_Project fill:#93c47d
des_Project <|-- des_HarnessProject
click des_Project href "../../classes/des_Project/"
des_HarnessProject --> "*" des_ProjectRelease : releases
click des_ProjectRelease href "../../classes/des_ProjectRelease/"
class des_ProjectRelease["Hardware Project Release"]
style des_ProjectRelease fill:#93c47d
des_HarnessProject --> "*" lib_Part : parts
click lib_Part href "../../classes/lib_Part/"
class lib_Part["Part"]
style lib_Part fill:#ffe599
des_HarnessProject --> "*" lib_ComponentRevision : components
click lib_ComponentRevision href "../../classes/lib_ComponentRevision/"
class lib_ComponentRevision["Component Revision"]
style lib_ComponentRevision fill:#ffe599
des_HarnessProject --> "*" des_ProjectParameter : parameters
click des_ProjectParameter href "../../classes/des_ProjectParameter/"
class des_ProjectParameter["Project Parameter"]
style des_ProjectParameter fill:#93c47d
des_HarnessProject --> "*" des_ProjectVariant : variants
click des_ProjectVariant href "../../classes/des_ProjectVariant/"
class des_ProjectVariant["Hardware Project Variant"]
style des_ProjectVariant fill:#93c47d
des_HarnessProject --> "*" plt_Solution : part of solution
click plt_Solution href "../../classes/plt_Solution/"
class plt_Solution["Solution"]
style plt_Solution fill:#cccccc
des_HarnessProject : id
Comments
Harness Project provides a structured representation of connectivity at the physical wiring level, complementing schematic and PCB projects while maintaining its own lifecycle and identity. It enables engineers to design, document, and validate interconnects in a way that is traceable, manufacturable, and tightly integrated with Multiboard and MCAD workflows within the Altium ecosystem.
Inheritance
- core_Entity
- core_Activity
- des_Project [ plt_SolutionItem]
- des_HarnessProject
- des_Project [ plt_SolutionItem]
- core_Activity
Fields
| Name | Cardinality | Type | Description | Inheritance |
|---|---|---|---|---|
| releases | * |
Hardware Project Release | The release artifacts produced by this activity. Inverse of releaseOf. | des_Project |
| parts | * |
Part | Parts used in this Activity | des_Project |
| components | * |
Component Revision | Components used in this Activity | des_Project |
| parameters | * |
Project Parameter | TBD | des_Project |
| variants | * |
Hardware Project Variant | TBD | des_Project |
| part of solution | * |
Solution | TBD | plt_SolutionItem |
| id | 1 |
GRID | Globally unique identifier across the whole platform. | core_Entity |
Identifier and Mapping Information
Annotations
| property | value |
|---|---|
| platformAPI | DesProject |