| AddressBlock |
Address block with start, size, and optional registers and peripherals. |
| AddressMap |
Address map for the device including memory and peripheral regions. |
| AddressSegment |
A contiguous region of the device's memory map. Each segment can represent either a memory or a peripheral region. |
| ConfiguredDeviceModel |
A digital twin of an embedded hardware device as configured for a specific use-case. It exposes the device model filtered to specific device configuration. |
| FieldEnum |
An enumerated value for a register field. |
| FullStackDeviceModel |
A digital twin of an embedded hardware device. It exposes the full device model, including interfaces, peripherals, and ports. |
| Memory |
A memory entry within an address block. |
| Peripheral |
A single peripheral definition, including its instances and properties. |
| PeripheralConfiguration |
A concrete configuration for a peripheral role, containing pin multiplexing details. |
| PeripheralInstance |
A concrete instance of a peripheral (e.g., SCI0), including available modes. |
| PeripheralMode |
A specific mode that a peripheral instance can fulfill, |
| PeripheralParameter |
A paramter associated with peripheral instance configuration. |
| PeripheralPinConfig |
A specific pin multiplexing configuration within peripheral configuration. |
| PeripheralPinDependencyConfig |
A pin dependency to port mapping entry within peripheral configuration. |
| Pin |
A physical pin on the device. |
| Port |
A physical port on the device, with its functions, configurations, and connections. |
| PortConfiguration |
A specific configuration for a port. |
| PortConfigurationDependency |
A dependency describing how a configuration value maps to GPIO or alternate function usage. |
| PortConfigurationEnumValue |
An enumerated value for a port configuration. |
| PortConnection |
A connection from this port to another component or signal. |
| PortFunction |
A specific function that a port can perform. |
| Processor |
Represents a physical processing core. Defining endianness and clock frequency allows the system to determine if the hardware can meet the computational and data-ordering requirements of a use-case. |
| Register |
A hardware register within an address block. |
| RegisterField |
A bit field within a register. |