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Enum: dm_Endianness

Specifies the byte-ordering convention of the processor. Bi-endian indicates the hardware can be configured for either mode.

URI: https://w3id.org/altium/cdm/dm_Endianness

Permissible Values

Value Meaning Description
LittleEndian None Least significant byte is stored at the lowest address
BigEndian None Most significant byte is stored at the lowest address
BiEndian None Processor supports switching between little and big endian modes

Slots

Name Description
dm_Processor_endian The byte-ordering capability of the core

Identifier and Mapping Information

LinkML Source

name: dm_Endianness
implements:
- owl:NamedIndividual
description: Specifies the byte-ordering convention of the processor.  Bi-endian indicates
  the hardware can be configured for either mode.
in_subset:
- deviceModel
from_schema: https://w3id.org/altium/cdm/
is_a: Enumeration
enum_uri: dm:Endianness
permissible_values:
  LittleEndian:
    text: LittleEndian
    description: Least significant byte is stored at the lowest address.
    title: Little-endian
  BigEndian:
    text: BigEndian
    description: Most significant byte is stored at the lowest address.
    title: Big-endian
  BiEndian:
    text: BiEndian
    description: Processor supports switching between little and big endian modes.
    title: Bi-endian